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EN0-001Exam Code: EN0-001
Exam Name: ARM Accredited engineer
One year free update, No help, Full refund!
EN0-001 Latest Dumps Total Q&A: 210 Questions and Answers
Last Update: 2014-06-24

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NO.1 In the Generic Interrupt Controller (GIC), when an interrupt is requested, but is not yet being
handled, it is in which of the following states?
A. Inactive
B. Active
C. Pending
D. Edge-triggered
Answer: C

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NO.2 A simple system comprises of the following memory map:
Flash - 0x0 to 0x7FFF
RAM - 0x10000 to 0X17FFF
When conforming to the ABI, which of the following is a suitable initial value for the stack pointer?
A. Top address of RAM (0x18000)
B. Top address of flash (0x8000)
C. Bottom address of RAM (0x10000)
D. Bottom address of flash (0x0000)
Answer: A

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NO.3 Printf statements could be used to achieve which of the following debug tasks?
A. Observe changes to a local variable in a function
B. Capture a real-time trace of program execution
C. Debug boot code, before a call to the C main() function
D. Stop the processor at an interesting location in the code
Answer: A

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NO.4 When setting the initial location of the stack pointer and the base address of the heap, the
ARM EABI requires that the:
A. Base address of the heap must be the same as the initial stack pointer.
B. Stack pointer must be 8-byte aligned.
C. Heap must be in external RAM.
D. Initial stack pointer must be the lowest addressable memory location.
Answer: B

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NO.5 What view in a debugger displays the order in which functions were called?
A. The Call Stack view
B. The Memory view
C. The Registers view
D. The Variables view
Answer: A

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NO.6 In an ARMv7-A processor, which control register is used to enable the Memory Management
Unit (MMU)?
Answer: B

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12. A simple method of measuring the performance of an application is to record the execution
time using the clock on the wall or a wristwatch.
When is this method INAPPROPRIATE?
A. When executing the software using a simulation model
B. When the processor is a Cortex-R4
C. When instruction tracing is enabled
D. When the processor is not executing instructions from cache
Answer: A

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NO.7 A program running on a development board that is connected to a host using a debugger can
access a file on the host by using:
A. Memory mapping
B. Semihosting
C. Polling
D. Virtual I/O
Answer: B

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NO.8 In a Cortex-A9 processor, when the Memory Management Unit (MMU) is disabled, which of
the following statements is TRUE? (VA is the virtual address and PA is the physical address)
A. VA == PA; No address translations; instructions and data are not cached
B. VA! = PA; No address translations; instructions may be cached but not data
C. VA == PA; Address translations take place; data may be cached but not instructions
D. VA == PA; No address translations; instructions may be cached but not data
Answer: D

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Posted 2014/6/25 7:10:46  |  Category: ARM  |  Tag: EN0-001 Test AnswersARM